Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!usc!zaphod.mps.ohio-state.edu!pacific.mps.ohio-state.edu!linac!midway!quads.uchicago.edu!jcav From: jcav@quads.uchicago.edu (john cavallino) Newsgroups: comp.sys.apple2 Subject: Re: HLLs vs. Assembly Message-ID: <1991Apr4.185435.28753@midway.uchicago.edu> Date: 4 Apr 91 18:54:35 GMT References: <13202@ucrmath.ucr.edu> <15682@smoke.brl.mil> <13275@ucrmath.ucr.edu> Sender: bcareful@midway.uchicago.edu Organization: University of Chicago Lines: 16 One fact that hasn't yet been addressed in this discussion is the existence of new processor architectures (RISC especially) of such complexity that you REALLY DO NEED A COMPILER TO WRITE EFFICIENT SOFTWARE. I'm talking about things like multi-stage instruction pipelines which must be kept full to achieve good performance. What about branch prediction and register/pipeline interlock, which might involve actually changing the apparent order of instructions? Do you really want to have to keep track of stuff like that, when bunches of very smart people have already written compilers that will do it for you? Machine language isn't always the answer, and I suspect that will become more true in the future. -- John Cavallino | EMail: jcav@midway.uchicago.edu University of Chicago Hospitals | USMail: 5841 S. Maryland Ave, Box 145 Office of Facilities Management | Chicago, IL 60637 "Opinions, my boy. Just opinions" | Telephone: 312-702-6900