Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!sol.ctr.columbia.edu!emory!ogicse!usenet! From: canoyk@jacobs.cs.orst.edu (Kevin Canoy) Newsgroups: comp.sys.ibm.pc.hardware Subject: Bus Speed Message-ID: <1991Apr05.180737.15095@lynx.CS.ORST.EDU> Date: 5 Apr 91 18:07:37 GMT Sender: @lynx.CS.ORST.EDU Distribution: usa Organization: Oregon State University, CS Dept. Lines: 18 Nntp-Posting-Host: jacobs.cs.orst.edu I have a question about the phase Bus Speed. I know that the so called standard Bus Speed is 8MHz and that the faster the System clock becomes it is more important to run the Bus at a faster speed. I gess question goes as far back as the 8MHz and that is how do they determine the Bus Speed ? Do they use the Address Strobe Width or do they use the Write Cycle = Address Strobe Width + Write,/Write Strobe Width + Write Cycle Delay. Or best of all am I looking at this all wrong if so help !! Thanks. ******************************************************************** * canoyk@jacobs.cs.orst.edu (Kevin Canoy) * ********************************************************************