Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!uwm.edu!zaphod.mps.ohio-state.edu!mips!apple!agate!darkstar!kithrup!sef From: sef@kithrup.COM (Sean Eric Fagan) Newsgroups: comp.sys.next Subject: Re: RISC vs. CISC -- SPECmarks Message-ID: <1991Apr09.083600.13051@kithrup.COM> Date: 9 Apr 91 08:36:00 GMT References: <27fa3350.6bc2@petunia.CalPoly.EDU> <71367@brunix.UUCP> Organization: Kithrup Enterprises, Ltd. Lines: 51 In article <71367@brunix.UUCP> rca@cs.brown.edu (Ronald C.F. Antony) writes: >If RISC were software you would call it a hack, (or a C program with >tons of gotos for that matter). Say *what*?! How in Gaea's name did you reach that conclusion? Most RISC instruction sets, the MIPS in particular, are extremely well thought out and researched, just the *opposite* of what one would call a "hack." >Guess why NeXT went with Objective-C or >why other people go with Lisp. Not because it is the fastest, but >because it is clean. Objective C has *never* struct me as "clean." It always strikes me as an obvious hack on top of C. C++ is cleaner, although not perfect. >Say no to hacks, say no to RISC (at least in SPARC-like incarnations). Ah. The SPARC (and most chips with register-windows) are, IMHO, ugly. The SPARC also doesn't have a mulitply instruction (newer versions do, I know), and this caused it to be slower than a 68030 for certain applications. Not all RISCs are SPARCs. >In addition, the 68040 has built-in support for multi-processing. >Which of the RISC chips does? (This is a real question). 88k, R3000, R6000, R4000 (when it comes out). SPUR, I believe. i860. (Don't know about the i960, sorry.) SPARC (although it might be the sparc-2 instruction set that had it). 29k, I think. RIOS (IBM RS/6000). >If there is >any, then that's the one NeXT is most likely to choose, since I would >guess multiprocessing is a more general solution to performance >problems than any RISC-hack can offer, and thus I would suspect NeXT >is putting a higher priority on that than on RISC. 88k, R3000 or R4000. I doubt that NeXT will chose the SPARC, although they might. The 88k is from Motorola, as is the 68k line, so that might be an incentive. On the other hand, the MIPS chips are *fast*, and the R4000 is a 64-bit machine (both addresses and integer registers are 64-bits wide), which provides for future requirements. Go read comp.arch. -- Sean Eric Fagan | "I made the universe, but please don't blame me for it; sef@kithrup.COM | I had a bellyache at the time." -----------------+ -- The Turtle (Stephen King, _It_) Any opinions expressed are my own, and generally unpopular with others.