Path: utzoo!utgpu!news-server.csri.toronto.edu!bonnie.concordia.ca!thunder.mcrcim.mcgill.edu!snorkelwacker.mit.edu!spool.mu.edu!sdd.hp.com!elroy.jpl.nasa.gov!jarthur!petunia!news From: araftis@polyslo.CalPoly.EDU (Alex Raftis) Newsgroups: comp.sys.next Subject: Re: RISC vs. CISC -- SPECmarks Message-ID: <28021bb1.70d3@petunia.CalPoly.EDU> Date: 9 Apr 91 19:53:21 GMT References: <27fcdce4.3a0@petunia.CalPoly.EDU> Organization: Cal Poly State Univ,CSC Dept,San Luis Obispo,CA 93407 Lines: 18 >I rather see 4 50MHz R4000's than 4 68040's. Can you say Cray in a Cube? > > >-Mike I agree with most of what you're saying. I'd just rather see a 68040 controlling things, with three 50Mhz R4000's doing all the grunt like cranking out numbers. Up grading things in this manner circumvents the problem with re-writing the system software, but gives you most the benefits of RISC, and besides, your RISC chips under the above configur- ation don't need to worry about things like drawing and windows, something the 68040 handles very well (at least from what I've seen on the NeXT's) -- -------------------------------------------------- Internet: alex@cosmos.ACS.CalPoly.EDU or araftis@data.ACS.CalPoly.EDU for NeXTmail