Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!crdgw1!crdos1!davidsen
From: davidsen@crdos1.crd.ge.COM (Wm E Davidsen Jr)
Newsgroups: comp.arch
Subject: Mass produced custom chips
Message-ID: <3329@crdos1.crd.ge.COM>
Date: 12 Apr 91 13:31:26 GMT
Reply-To: davidsen@crdos1.crd.ge.com (bill davidsen)
Organization: GE Corp R&D Center
Lines: 35


  Another posting got me thinking about this, but I'll start a separate
thread, since it's somewhat off topic.

  Will the day ever come when we can fast build custom CPUs?

  By that I mean the customer will be able to order a CPU built with
certain instructions in hard code, perhaps some in microcode, designed
to run an o/s which will emulate the rest.

  Obviously this would have an upper bound so you couldn't have ALL
features, but consider trading a few register windows for another 8k
cache, or giving up some parallelism to get hardware divide.

  What this requires is a set of capabilities which I believe could be
available in the next decade.

  - fully automated chip layout. Doesn't have to be optimal, fully
    functional and nominal would do.

  - A program the customer could run on a PC or workstation to select
    the options, and then send then in by email, floppy, or whatever.
    (I think this capability is possible today)

  - direct computer controlled chip generation without a mask. If you
    don't have this to keep cost down the idea is too expensive to do.

  Okay, now everyone tell me what technology I missed. Remember that all
of these CPUs would still run the same software, so there is no need to
generate custom anything but silicon, or whatever we are using by the
time the rest of this could be done.
-- 
bill davidsen	(davidsen@crdos1.crd.GE.COM -or- uunet!crdgw1!crdos1!davidsen)
        "Most of the VAX instructions are in microcode,
         but halt and no-op are in hardware for efficiency"