Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!usc!apple!motcsd!udc!aduane From: aduane@urbana.mcd.mot.com (Andrew Duane) Newsgroups: comp.sys.m88k Subject: Re: Exception handling in the 88's Message-ID: <2524@urbana.mcd.mot.com> Date: 9 Apr 91 16:41:10 GMT References: <28961@dime.cs.umass.edu> Sender: netnews@urbana.mcd.mot.com Distribution: na Organization: Motorola Microcomputer Division, Urbana [IL] Design Center Lines: 39 In article <28961@dime.cs.umass.edu> black@par1.cs.umass.edu.CS.UMASS.EDU (David K. Black) writes: > >In the MC88100 User's manual on pages 6-8 and 6-9 (Section 6.4.2) >there apears a discussion of two methods for exception processing >in the 88's. To summarize: >Method 1: Disable interrupts etc and don't save any context to memory. >Use the rte instruction to restore control registers. Shadowing remains >disabled and a non-trap exception will crash the machine. >My question is: Under what cicumstances is the first method acceptable? >Are there any OS code writers within "the sound of my voice" who have >actually confronted this problem? I have seen some of the responses to this so far, and thought that it would be appropriate for me to cast the single "yes" vote. I am doing interrupt and other locore work for the motorola MVME188QP quad processor board. We have designed a set of "fast" interrupts that are propagated from processor to processor to do hardware operations such as updating the IEN enable masks. This requires no context to be saved, and was designed around being very fast for the interrupted processor, so we do it in about 20 instructions or so right at interrupt time, before any saving or re-shadowing is done. At RTE from this, any other pending exceptions will he handled normally. BTW, your characterization of "crash"ing the machine on another exception is not accurate. The chip takes an error exception, the only one that is allowed with shadowing disabled. For many platforms (the 188QP) included, that may well drop you into the ROM monitor, but it does not crash the machine in the way you implied. Andrew L. Duane (JOT-7) w:(408)366-4935 Motorola Microcomputer Design Center decvax!cg-atla!samsung!duane 10700 N. De Anza Boulevard uunet/ Cupertino, CA 95014 duane@samsung.com Only my cat shares my opinions, and she's Intel 80286 based.