Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!swrinde!elroy.jpl.nasa.gov!ncar!csn!tusun2!lansford From: lansford@tusun2.mcs.utulsa.edu (Wendell Wayne Lansford) Newsgroups: sci.electronics Subject: Re: MOSFET Puzzle Message-ID: <1294@tusun2.mcs.utulsa.edu> Date: 12 Apr 91 16:09:13 GMT References: <1285@tusun2.mcs.utulsa.edu> <2178@gold.gvg.tek.com> Reply-To: lansford@tusun2.UUCP (Wendell Wayne Lansford) Distribution: na Organization: University of Tulsa, Tulsa, Oklahoma Lines: 20 Your solution is interesting. My professor, who originally solved the problem for an instructor in New York who was witnessing this phenomenon in his use of MOSFETs, gave me his solution. The solution is rather tedious, but the theory is as follows: The fact that the device is a transistor is only incidental to the observation that it is a distributed RC structure. Vinput is from the Gate to the Source and Voutput is from the Drain to the Source (ie a typical connection). The channel exhibits a total resistance, Rt. The gate and channel form a distributed capacitor, C. The idea is that at some frequency, Vgd (Voltage from gate to drain) will be 180 degrees out of phase with Vinput. Noting that Voutput = Vinput - Vgd, it can be seen that at this 180 degrees out of phase frequency, Voutput will be greater than Vinput. This "passive" voltage gain phenomenon should be observed at frequencies around 1 GigaHz for uncased, leadless devices. Wendell Lansford lansford@tusun2.mcs.utulsa.edu