Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!crdgw1!uunet!comp.vuw.ac.nz!waikato.ac.nz!ldo From: ldo@waikato.ac.nz (Lawrence D'Oliveiro, Waikato University) Newsgroups: comp.arch Subject: Bitfield instructions--a good idea? Message-ID: <1991Apr15.193425.3436@waikato.ac.nz> Date: 15 Apr 91 07:34:25 GMT Organization: University of Waikato, Hamilton, New Zealand Lines: 29 What do RISC designers think of bitfield instructions? (A la the VAX and 680x0 [x >= 2] processors: extract so many bits at a certain offset, insert so many bits at a certain offset, etc.) I was doing some work on some GIF image decompression code on a 68020 processor (a Macintosh LC)--a lot of bit manipulation involved. I looked up the instruction timings for the bitfield instructions in my 68020 handbook, and was mildly dismayed to find that they took about twice as long to execute as a shift or mask instruction! But I tried using them anyway. Motorola's bit-numbering scheme in these instructions was the opposite of the natural order for solving my problem, so I first had to reverse the order of each bufferful of bytes after reading them in, before I could start extracting the compressed data symbols. The result? I sped up the code by more than 20%. I know the compiler I was using generated pretty lousy code, but it allowed the insertion of in-line machine code, which was how I was fine-tuning the time-consuming parts. Do other people find these instructions useful? Lawrence D'Oliveiro fone: +64-71-562-889 Computer Services Dept fax: +64-71-384-066 University of Waikato electric mail: ldo@waikato.ac.nz Hamilton, New Zealand 37^ 47' 26" S, 175^ 19' 7" E, GMT+12:00 To someone with a hammer and a screwdriver, every problem looks like a nail with threads.