Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!usc!rpi!crdgw1!crdos1!davidsen
From: davidsen@crdos1.crd.ge.COM (Wm E Davidsen Jr)
Newsgroups: comp.arch
Subject: Re: Dynamic Display Architecture
Message-ID: <3340@crdos1.crd.ge.COM>
Date: 15 Apr 91 13:01:40 GMT
References: <1991Apr15.200955.3438@waikato.ac.nz>
Reply-To: davidsen@crdos1.crd.ge.com (bill davidsen)
Organization: GE Corp R&D Center, Schenectady NY
Lines: 24

In article <1991Apr15.200955.3438@waikato.ac.nz> ldo@waikato.ac.nz (Lawrence D'Oliveiro, Waikato University) writes:

| But one of the interesting bits of hardware in that machine is a processor
| called the "Copper": its sole job is to watch the video beam, and poke
| various machine registers (that you specify) when the beam gets to particular
| positions on the screen. For example, you could change to a different
| frame buffer halfway down the screen, or redefine a set of colour table
| registers. It's true the CPU can do all this as well, but it makes
| sense to pass as much of the load as possible to the Copper.

  This sounds like the Intel video controller, part number forgotten.
This is the one they announced, dropped, then said they'd make because
people had committed to it.

  I believe the ability to have a list of frame buffers, with the size
and starting pixel of each, was one of the features. It sounded like the
perfect display chip, but the TI came out at the same time and had a lot
of other useful features, and the Intel didn't sell well.

  This from memory, and on a Monday morning, too.
-- 
bill davidsen	(davidsen@crdos1.crd.GE.COM -or- uunet!crdgw1!crdos1!davidsen)
        "Most of the VAX instructions are in microcode,
         but halt and no-op are in hardware for efficiency"