Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!uwm.edu!rpi!zaphod.mps.ohio-state.edu!think.com!mintaka!bloom-beacon!eru!hagbard!sunic!mcsun!tuvie!mike From: mike@vlsivie.tuwien.ac.at (Michael K. Gschwind) Newsgroups: comp.arch Subject: Re: Instruction Scheduling Keywords: SPEC compilers CDC Mips Message-ID: <2400@tuvie.UUCP> Date: 10 Apr 91 07:45:27 GMT References: <32097@shamash.cdc.com> <1991Apr8.224717.14402@aero.org> Sender: news@tuvie.UUCP Organization: Vienna University of Technology Lines: 10 In article <1991Apr8.224717.14402@aero.org> jordan@aero.org (Larry M. Jordan) writes: >Where and when does instruction scheduling/reorganizing occur? Is >this function performed by the HOL compilers? (If so, the symbolic >assembly I'm reading obscures this fact. If not, then during >assembly?) > >In a word or two, could someone summarize the pros/cons for either >approach (HOL or independent lang. independent pass)? > >--Larry