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From: zalman@mips.com (Zalman Stern)
Newsgroups: comp.arch
Subject: Re: Bitfield and loop instructions--a good idea?
Message-ID: <2337@spim.mips.COM>
Date: 16 Apr 91 22:29:07 GMT
References: <1991Apr15.193425.3436@waikato.ac.nz> <2302@spim.mips.COM>
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In article <2302@spim.mips.COM> I (zalman@mips.com) write:
[...]
>MIPS-II (R3000) to MIPS-III (R4000). (With 64 bit registers you now need 6

The mapping from R-series implementations to versions of the
architecture is something like:

    R2000  MIPS-I
    R2000A MIPS-I (same die as R3000)
    R3000  MIPS-I
    R3000A MIPS-I plus reverse endian bit
    R4000  MIPS-III
    R6000  MIPS-II (ECL implementation, all others CMOS)

MIPS-I is the instruction set documented in the Kane book. MIPS-II and
MIPS-III will be documented in a forthcoming revision of that book.
MIPS-II has a number of minor architectural improvements and MIPS-III does
64 bits. Each revision is of course upwards compatible with previous ones
(at least for user code).

My apologies for the above quoted confusion. I'm sure someone will correct
me if I got it wrong here too.