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From: nbvs@cl.cam.ac.uk (Nicko van Someren)
Newsgroups: comp.sys.acorn
Subject: Re: Memory handling
Message-ID: <1991Apr17.114822.19126@cl.cam.ac.uk>
Date: 17 Apr 91 11:48:22 GMT
References: <1991Mar20.143227.247@ecc.tased.oz.au> <1991Mar22.171119.11147@ifi.uio.no> <6079@acorn.co.uk> <4826@syma.sussex.ac.uk>
Reply-To: nbvs@cl.cam.ac.uk (Nicko van Someren)
Organization: U of Cambridge Comp Lab, UK
Lines: 14

In article <4826@syma.sussex.ac.uk> gavinw@syma.sussex.ac.uk writes:
>Two enhancements to future ARMs that I would like to see are
>
>i) 'modify offset-register' writeback addressing-modes
>ii) trap register-values-outside-given-range to speed up range
>checking.

While they are at it, they could make it a CISC processor!     ;-)



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| Nicko van Someren, nbvs@cl.cam.ac.uk, (44) 223 358707 or (44) 860 498903    |
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