Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!swrinde!elroy.jpl.nasa.gov!jarthur!sif.claremont.edu!greg From: greg@sif.claremont.edu (Tigger) Newsgroups: comp.sys.next Subject: Re: RISC vs. CISC -- SPECmarks Message-ID: <1991Apr18.180538.1@sif.claremont.edu> Date: 19 Apr 91 01:05:38 GMT References: <71367@brunix.UUCP> <8lbG1vdl1@cs.psu.edu> Sender: news@jarthur.Claremont.EDU Organization: Pomona College Lines: 50 In article , melling@cs.psu.edu (Michael D Mellinger) writes: > > In article <1991Apr17.192605.1@sif.claremont.edu> greg@sif.claremont.edu (Tigger) writes: > > Unless you're paying supercomputer > prices, that means you can't build a whole GaAs computer. > > Is there some reason that memory can't be built out of GaA? Cost. I believe Seymour Cray has been working on the first commercially available gallium arsenide computer. As I'm sure you can imagine, the price is many orders of magnitude higher than you or I could afford. > Also, > RISC chips will be the first CPU's made out of GaA because of the low > # of transisters that can currently be put on on a chip made out of > GaA, and RISC chips require fewer CPUs than the monolithic 68040. I could be wrong, but don't some of the current RISC chips (such as IBM's RIOS) begin to approach the complexity of the 68040? Besides, you can always split the chip up, the way Motorola has done with their 88000 chip set. There is something of a performance penalty, but it really isn't necessary to have your floating point and memory management units on the same ship is it? > Anyway, NeXT needs a near term solution to the price/performane rat > race, and RISC is currently blowing the doors off of CISC. I would tend to disagree. I have a benchmark that I run periodically when I have the chance to get my hands on a new machine with a C compiler. The VAX 9000 and the NeXT '040 are two of the three fastest machines that I've had a chance to test. Both are CISC designs. Both outperformed systems based on the two most widespread RISC designs, MIPS and SPARC. The only RISC chip that was in the same league was RIOS, and then only when the compiler's optimization was turned on to insure superscalar operation. I'm not trying to put RISC down. Currently, the things that really make RISC are the best way to go. Hell, the fact that some of those concepts were used in the 68040 is probably the single most important factor in it being such a good chip. While it certainly isn't a RISC chip, it isn't really a CISC design either. It's a hybrid. I guess you could look at it kinda like modern economics. Neither pure capitalism nor pure socialism exist, because a mix of some sort turns out to be better. Take the best of both worlds and make something better. The 68040, I think, is a step in that direction. It will be interesting ten or fifteen years from now to see whether that's the way things have gone. | Greg Orman Let's get lost | | greg@pomona.claremont.edu - Fieger/Averre |