Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!wuarchive!udel!sbcs!eeserv1.ic.sunysb.edu!jallen From: jallen@eeserv1.ic.sunysb.edu (Joseph Allen) Newsgroups: comp.arch Subject: Floating Point Risc Message-ID: <1991Apr20.063947.12811@sbcs.sunysb.edu> Date: 20 Apr 91 06:39:47 GMT Sender: usenet@sbcs.sunysb.edu (Usenet poster) Organization: State University of New York at Stony Brook Lines: 20 Originator: jallen@eeserv1.ic.sunysb.edu How's this for a risc processor: No integer instructions at all. Addresses would be floating point too, but automatically INTed when presented to the address lines (or maybe normalized floating point numbers themselves could be used as addresses...). There would be one floating point number per integer address or 4 or 8 bytes per address (load byte at location 123.75). When bytes are loaded/stored they're also converted to/from floating point while they're in the registers. The math people would love it :-) Oh, plus many peripherals could use the floating point directly: forget about 4G colors, have 4G colors with logmerthic intensity... Same deal with sound... -- #define h 23 /* Height */ /* jallen@ic.sunysb.edu (129.49.12.74) */ #define w 79 /* Width */ /* Amazing */ int i,r,b[]={-w,w,1,-1},d,a[w*h];m(p){a[p]=2;while(d=(p>2*w?!a[p-w-w]?1:0:0)|( p