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From: dhinds@elaine18.Stanford.EDU (David Hinds)
Newsgroups: comp.arch
Subject: Re: Loop instructions
Message-ID: <1991Apr21.210031.16749@leland.Stanford.EDU>
Date: 21 Apr 91 21:00:31 GMT
References: <1991Apr16.152438.3445@waikato.ac.nz> <12739@pt.cs.cmu.edu>
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In article <12739@pt.cs.cmu.edu> lindsay@gandalf.cs.cmu.edu (Donald Lindsay) writes:
>In article <1991Apr16.152438.3445@waikato.ac.nz> 
>	ldo@waikato.ac.nz (Lawrence D'Oliveiro, Waikato University) writes:
>>On the 68000 family, the DBcc loop instructions decrement the 16-bit count
>>register and stop looping when it reaches -1 (or 65535), not 0.
>
>Compiler writers dislike this instruction, but not because of the
>test semantics. The killer is that the count is 16 bits, on a machine
>where variables and expressions are naturally 32 bits. This means
>that the compiler can only use the instruction when it possesses
>range information. 
>
>A sophisticated compiler (with optimization enabled) can often deduce
>ranges. However, when that machine came out, the instruction was
>essentially only usable by assembler programmers.

    I'm not familiar with the 68000 instruction set, but couldn't this
instruction be adapted to 32-bit counts by just splitting the count into
upper and lower half-words and using a nested pair of 16-bit loops?  This
would have minimal overhead - a few instructions in loop setup - but would
have essentially the same performance as the 16 bit count for long loops.

 -David Hinds
  dhinds@cb-iris.stanford.edu