Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!usc!snorkelwacker.mit.edu!bloom-beacon!eru!hagbard!sunic!mcsun!cernvax!chx400!chx400!bernina!prl
From: prl@iis.ethz.ch (Peter Lamb)
Newsgroups: comp.arch
Subject: Sun4 caches?
Summary: Wanted: cache structure information
Keywords: SPARC, Sun4, cache
Message-ID: <prl.672351796@iis>
Date: 22 Apr 91 20:23:16 GMT
Sender: news@bernina.ethz.ch (USENET News System)
Distribution: comp
Organization: Swiss Federal Institute of Technology (ETH), Zurich, CH
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I would appreciate it if someone could send me a short summary
(or a pointer to one on anon FTP) of the cache structure for Sun4's
(especially SparcStations).

I have a performance problem which may be cache-related, and I need
to know a little more than I would otherwise care about the caches.

I/D separation, line width, virtual/physical address tags, mapping
from address into cache line address, replacement strategy if not one-way,
etc.

Thanks in advance,

--
Peter Lamb
uucp:  uunet!mcsun!ethz!prl	eunet: prl@iis.ethz.ch	Tel:   +411 256 5241
Integrated Systems Laboratory
ETH-Zentrum, 8092 Zurich