Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!mips!daver!dlb!netcom!resnicks From: resnicks@netcom.COM (Steve Resnick) Newsgroups: comp.os.msdos.programmer Subject: Re: Ms-Dos Source Message-ID: <1991Apr21.143248.11081@netcom.COM> Date: 21 Apr 91 14:32:48 GMT References: <91107.143308IO92203@MAINE.BITNET> <1991Apr19.150904.6241@netcom.COM> <1434@balrog.ctron.com> Organization: Netcom - Online Communication Services UNIX System {408 241-9760 guest} Lines: 60 In article <1434@balrog.ctron.com> dj@ctron.com writes: [Stuff Deleted] >Side note (ie: no flames, please): > >The 80386 is the first chip to support "true" multitasking. This >means that it actually has a task register, task management opcodes >and hardware, and each process thinks it's the only one. When the CPU >needs to handle exceptions (interrupts, system calls, faults), the >hardware *automatically* saves the ENTIRE state of the CPU and current >task in that task's Task State Segment and loads the ENTIRE state of >the new task to run. This is normally done with no software >interaction at all. This is true multitasking. > >On lesser processors, "simulated" multitasking is used. There is only >one processor state, and when you want to run a different task, the >currently executing task must, in it's own context, manually reload >all of the registers, stack, etc, and become the new task. Interrupts >and exceptions are always serviced in the context of the running >program. > >One might argue that the same thing is happening in both cases. It >is. The difference is that for the 386, it happens automatically, and >for lesser processors it must be done in software. Have you ever read the Intel 80286 and 80287 Programmer's Reference Manual, pub number 210498-004, 1987? This manual describes, amoung other things, that an 80286 has inherent register support for multi-tasking. (Look at page B-72 where it describes the LTR (load task register) instruction. If you had also read the sections on multi-tasking in the 80386 programmers refference manual you would have noted references made to an 80286 style TSS (16 bit vs 32 bit Task State Segment) It is simply NOT TRUE that the 80386 is the first intel chip to support multi-tasking. Perhaps, the most signifigant difference between the 80286 and the 80386, when dealing with real-mode operating systems, is the support for virtual 8086 tasks with the added ability of being able to switch back and forth between real and protected mode without hardware kludges to reset the processor. I run my system under OS2, an 80286 operating system which out performs the 80386 DOS/QEMM/DESQview/Windows combinations I run at work. I don't mean to flame anybody, but I have been hearing on the net and otherwise, that the 80286 doesn't support true multi-tasking, and grow tired of the mis-information about it. - Steve -- ------------------------------------------------------------------------------- resnicks@netcom.com, steve@camphq, IFNA: 1:143/105.0, USNail: 530 Lawrence Expressway, Suite 374 Sunnyvale, Ca 94086 - In real life: Steve Resnick. Flames, grammar and spelling errors >/dev/null 0x2b |~ 0x2b, THAT is the question. The Asylum OS/2 BBS - (408)263-8017 12/2400,8,1 - Running Maximus CBCS 1.2 -------------------------------------------------------------------------------