Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!casbah.acns.nwu.edu!ftpbox!mothost!motcid!murphyn From: murphyn@motcid.UUCP (Neal P. Murphy) Newsgroups: comp.sys.3b1 Subject: Re: Hardware freaks Unite (on this one) Keywords: 3B1, cache, hardware project suggestion. Message-ID: <6935@bone13.UUCP> Date: 19 Apr 91 04:45:30 GMT References: <95@fbits.ttank.com> <1991Mar26.023948.3966@i88.isc.com> <6386@acorn.co.uk> Organization: Motorola Inc., Cellular Infrastructure Div., Arlington Heights, IL Lines: 20 agodwin@acorn.co.uk (Adrian Godwin) writes: >In article <1991Mar26.023948.3966@i88.isc.com> botton@i88.isc.com (Brian D. Botton) writes: >> Motorola has an app note that describes how to make a daughter board for >>the 68020 to replace a 68000 or 68010, you can also have a 68881/2. I would >>dearly love to make this board, including support for vidpal, but I haven't >>had the time. I just don't have time to do both the kernel mods and the >>hardware. >> BTW, the 68020 does have an instruction cache and the app note claims ~ 100% >>increase in performance. If anyone who has access to the code would like to I happened to find this app note in a drawer in the semi-conductor sales office here. The figures in it seemed to indicate 40%-60% increase in performance. I believe this board just directly replaces the '000 or '010 with an '020 and an '881. Of course, I had the wild idea that one could strap two Unix-PC mother- boards together to create a 32-bit bus. This would probably require major low-level code changes, though... NPN