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From: mark@acorn.co.uk (Mark Taunton)
Newsgroups: comp.sys.acorn
Subject: Correction Re: Proposed ARM enhancements (was Re: Memory handling)
Message-ID: <6463@acorn.co.uk>
Date: 18 Apr 91 13:01:23 GMT
References: <4826@syma.sussex.ac.uk> <6442@acorn.co.uk>
Reply-To: mark@acorn.co.uk (Mark Taunton)
Organization: Acorn Computers Ltd, Cambridge, UK
Lines: 29

A correction to my earlier posting about range-checking in ARM code.

Excuse the slightly pedantic attention to detail, but I wouldn't want
to cause headaches if someone actually tried to use it.

In article <6442@acorn.co.uk> I wrote:
>  [examples of shortening range-checking code sequences, including...]
>	cmp	rx, #upper_bound {r_upper_bound}
>	rsble	rtemp, rx, #lower_bound {r_lower_bound}
>	swigt	SWI_range_error


A colleague helpfully pointed out to me that the middle line in that
example should have read:

	rsbles	rtemp, rx, #lower_bound {r_lower_bound}

in other words, you need to explictly set the condition codes on the
result of the RSB.

In addition, note that if the lower bound is available in a register,
you don't need the temporary:

	cmp	rx, #upper_bound {r_upper_bound}
	cmple	r_lower_bound, rx
	swigt	SWI_range_error


Mark Taunton, Acorn Computers Ltd.		mark@acorn.co.uk