Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!wuarchive!sdd.hp.com!caen!hellgate.utah.edu!dog.ee.lbl.gov!ucbvax!agate!darkstar!ucscb.UCSC.EDU!unknown From: unknown@ucscb.UCSC.EDU (The Unknown User) Newsgroups: comp.sys.apple2 Subject: Re: speed loss Message-ID: <14708@darkstar.ucsc.edu> Date: 19 Apr 91 08:26:28 GMT References: <9104181535.AA28525@apple.com> Sender: usenet@darkstar.ucsc.edu Organization: University of California, Santa Cruz; Open Access Computing Lines: 20 In article <9104181535.AA28525@apple.com> THROOP@GRIN1.BITNET ("Throop,Henry B") writes: >[toddpw writes about RAM refreshing] > >Does this have anything to do with why IBM systems use 9 RAM chips (for >parity checking?) where 8 do in the gs? No.. The hardware parity checking seems to me like a hell of a big waste of dinero/moolah/cash/money... It has nothing to do with RAM refreshing.. As you said, it's parity checking.. I don't know whether they work on odd or even parity, but the extra bit is set so that there are an odd (or even) number of ones in the whole 9 bits.. The parity bit will show if there is ONE bit error in the byte, but I believe it tells absolutely nothing about where the error is, like some other checks.. -- /unknown@ucscb.ucsc.edu Apple IIGS Forever! WANT ULTIMA VI //e or GS?-mail me.\ \CHEAP CDs info-mail me. McIntosh Junior: The Power to Crush the Other Kids. /