Newsgroups: comp.sys.apple2 Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!wuarchive!m.cs.uiuc.edu!ernie!bazyar From: bazyar@ernie (Jawaid Bazyar) Subject: Re: ASIC Prototype Message-ID: <1991Apr20.072307.21651@m.cs.uiuc.edu> Sender: news@m.cs.uiuc.edu (News Database (admin-Mike Schwager)) Nntp-Posting-Host: ernie.cs.uiuc.edu Reply-To: bazyar@cs.uiuc.edu (Jawaid Bazyar) Organization: Mutation Testing Facility, University of Illinois References: <8686@crash.cts.com> Date: Sat, 20 Apr 91 07:23:07 GMT Lines: 31 In article <8686@crash.cts.com> greggb@pro-fred.cts.com (System Administrator) writes: >In-Reply-To: message from bazyar@ernie > >Alright Jawaid, > >If this chip is reality, answer just one question for the inquiring minds >in netland: Is this chip 1) a direct replacement for the 65c816, 2) on >its own card, or 3) an add on for another vendor's card? (Vendor name >please... :) > >Is that so much to ask? This is all information that has been posted on the net before and discussed (mostly in the original posts about the subject by the administrator of the UMICH FTP site (sorry I can't remember your name, it's late)). The ASIC will be a direct replacement for the '816. It will only be useful to current GS owners in a modified accelerator card, either a Zip or Transwarp depending on your bent (or what you already have). According to Zip engineers, the Zip will run at a faster all around rate than the Transwarp, but that has yet to be proven experimentally. Lastly, this chip was completely designed and simulated with a computer and guaranteed to work correctly at high clock speeds- no messy hacks like power supply fussing (ala the WDC part), or having to slow down for certain instruction sequences. -- Jawaid Bazyar | "Twenty seven faces- with their eyes turned to Senior/Computer Engineering | the sky. I have got a camera, and an airtight bazyar@cs.uiuc.edu | alibi.." Apple II Forever! | I need a job... Be priviliged to pay me! :-)