Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!sol.ctr.columbia.edu!emory!att!pacbell.com!ucsd!sdcc6!beowulf!velasco From: velasco@beowulf.ucsd.edu (Gabriel Velasco) Newsgroups: comp.sys.ibm.pc.hardware Subject: Re: Speed of RAM Keywords: speed, RAM Message-ID: Date: 19 Apr 91 23:10:32 GMT References: <1991Apr15.134754.7239@swsrv1.cirr.com> <1991Apr15.233221.18417@amd.com> <2fkgv6n@rpi.edu> <1991Apr16.163258.24221@amd.com> Sender: news@sdcc6.ucsd.edu Lines: 26 dorsai@iear.arts.rpi.edu (gregory d moncreaff) writes: >... on the other hand, my memory controller, in a 386sx-16Mhz >board, the 82c212, says that it will support 0 wait states with 120ns ram. as >the motherboard was sent to me with 80ns rams on it i am slightly confused. The 120ns and 80ns times refer to how long it takes for the memory chip to return the data that have been requested. Clearly, an 80ns chip is faster than a 120ns chip because it takes less time to access it. A wait state is exactly that. The CPU has to wait because the memory takes too long to return the data that the CPU has requested. A very fast CPU coupled with slow memory may have to wait many cycles before it gets it data. During this time, it does nothing. Memory access time can place a lower bound on system performance. Since your CPU will support 0 wait states (i.e., it doesn't have to wait) with a 120ns ram, it seems logical that it would support 0 wait states with faster 80ns ram. Even though 80ns chips are usually more expensive than 120ns chips, manufacturers often run out of the more common, less expensive chips and have to substitute the more expensive chips that they have lying around rather than stop production. -- ________________________________________________ <>___, / / | ... and he called out and said, "Gabriel, give | /___/ __ / _ __ ' _ / | this man an understanding of the vision." | /\__/\(_/\/__)\/ (_/_(/_/|_ |_______________________________________Dan_8:16_|