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From: preston@LL.MIT.EDU (Steven Preston)
Newsgroups: comp.sys.next
Subject: Re: RISC vs. CISC -- SPECmarks
Message-ID: <9104220802.AA09560@LL.MIT.EDU>
Date: 22 Apr 91 12:02:31 GMT
Sender: daemon@tut.cis.ohio-state.edu
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> I could be wrong, but don't some of the current RISC chips (such as
> IBM's RIOS) begin to approach the complexity of the 68040?

Yes, it is clear that RISC has become a misnomer; it (RISC) now means that
the average cycles per instruction is about 1 or less.

I read somewhere that Motorola claims that the '040 takes an average
of 1.3 clock cycles per instruction.  This probably qualifies it as a
RISC machine, by the above criterion.

--
Steve Preston  (preston@ll.mit.edu)