Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!swrinde!sdd.hp.com!spool.mu.edu!cs.umn.edu!uc!noc.MR.NET!gacvx2.gac.edu!gacvx2.gac.edu!scott From: scott@texnext.gac.edu (Scott Hess) Newsgroups: comp.sys.next Subject: Re: RISC vs. CISC -- SPECmarks Message-ID: Date: 23 Apr 91 15:19:27 GMT References: <71367@brunix.UUCP> <8lbG1vdl1@cs.psu.edu> <1991Apr18.180538.1@sif.claremont.edu> Organization: Gustavus Adolphus College Lines: 61 Nntp-Posting-Host: texnext.gac.edu In-reply-to: greg@sif.claremont.edu's message of 19 Apr 91 01:05:38 GMTLines: 61 In article <1991Apr18.180538.1@sif.claremont.edu> greg@sif.claremont.edu (Tigger) writes: > Also, > RISC chips will be the first CPU's made out of GaA because of the low > # of transisters that can currently be put on on a chip made out of > GaA, and RISC chips require fewer CPUs than the monolithic 68040. I could be wrong, but don't some of the current RISC chips (such as IBM's RIOS) begin to approach the complexity of the 68040? Besides, you can always split the chip up, the way Motorola has done with their 88000 chip set. There is something of a performance penalty, but it really isn't necessary to have your floating point and memory management units on the same ship is it? If you look, you'll see that all of the chips that have been created in the past couple years seem to be RISC chips (this was brought to my attention by a prof in one of my classes just this spring). It seems to be true! What it makes one wonder is whether the naming of chips like the RIOS RISC is done because they are really RISC, or because RISC is what people want. Considering all I've seen on the RIOS (not much, admitedly), I'd say it's more of a CISC that uses some of the things that RISC people have found to be helpful to make fast chips. > Anyway, NeXT needs a near term solution to the price/performane rat > race, and RISC is currently blowing the doors off of CISC. I would tend to disagree. I have a benchmark that I run periodically when I have the chance to get my hands on a new machine with a C compiler. The VAX 9000 and the NeXT '040 are two of the three fastest machines that I've had a chance to test. Both are CISC designs. Both outperformed systems based on the two most widespread RISC designs, MIPS and SPARC. The only RISC chip that was in the same league was RIOS, and then only when the compiler's optimization was turned on to insure superscalar operation. ??? The local Personal Iris with an R2000 is apparently the equal of our NextStations. Not that that's bad - after all the NextStation costs about 1/5 the price. Then again, the Iris is a couple years older, too. The ones running with R4000 should be about 2-4 times the speed of an '040. I guess I really don't care what happens. There definitely is room for both CISC and RISC. I don't see any processors in the near future breaking the strangle-hold on the market that 80x86 and 680x0 have - those have gotta account for something like 98% of all CPUs shipped, if not more. But I guess it's not hard to see that each version of those chips is requiring more and more work to get them faster. Which isn't bad - it's not like Motorola and Intel can't afford the work, right? But either way, I think falling into the problems Apple has with changing the Mac, and IBM/Microsoft have changing the PC is dangerous. If we could supply the interoperability that the PC supplies (a PC is a PC is a PC) in a more general manner (across platforms), I think the wins could be pretty decent. NeXT is going to have to be darn flexible if they want to win in more than the "Professional Workstation" market, and by moving to a multiple-architecture approach, they could do it. Later, -- scott hess scott@gac.edu Independent NeXT Developer GAC Undergrad "Simply press Control-right-Shift while click-dragging the mouse . . ." "I smoke the nose Lucifer . . . Banana, banana."