Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!batcomputer!cornell!rochester!pt.cs.cmu.edu!o.gp.cs.cmu.edu!andrew.cmu.edu!wm1h+ From: wm1h+@andrew.cmu.edu (Wayne Alan Martin) Newsgroups: sci.electronics Subject: Re: Plans wanted for binary/BCD digital clock Message-ID: Date: 19 Apr 91 01:14:43 GMT References: <102132@tut.cis.ohio-state.edu>, <2610006@hplvec.LVLD.HP.COM> Organization: Carnegie Mellon, Pittsburgh, PA Lines: 6 In-Reply-To: <2610006@hplvec.LVLD.HP.COM> I am fairly sure a design for a digital binary clock was featured in a recent (meaning last couple of years) issue of radio electronics or its sister publication hands-on-electronics. The basic design is simple, just some cascaded counters with a reset logic on reaching 60. Hope this helps. Wayne Martin