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From: edwardm@hpcuhe.cup.hp.com (Edward McClanahan)
Newsgroups: comp.arch
Subject: Re: overview of HP-PA Bitfield insts.
Message-ID: <32580020@hpcuhe.cup.hp.com>
Date: 23 Apr 91 19:03:19 GMT
References: <51584@apple.Apple.COM>
Organization: Hewlett Packard, Cupertino
Lines: 23

Phil Vitale responds:

> > (Lawrence D'Oliveiro, Waikato University)
> > Hmmm, I seem to recall from another discussion some time ago that the
> > HP-PA is one of those processors that will correctly invalidate its 
> > instruction cache if you do any writes to program code in memory.

> You need to execute a Flush Instruction Cache (FIC) to make sure the old
> line is out of the instruction cache.

> To handle the data cache, the Flush Data Cache (FDC) instruction should
> be used to make sure memory has the latest copy of the modified code.

And finally, you'd better do a SYNC instruction (which waits for the FIC
and FDC instructions to "complete").

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  Edward McClanahan
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