Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!wuarchive!rex!uflorida!screamer!twins!gambert From: gambert@twins.csee.usf.edu (Allen Gambert) Newsgroups: comp.lsi.cad Subject: Conference on VLSI Design Keywords: VLSI Message-ID: <1313@screamer.csee.usf.edu> Date: 24 Apr 91 14:16:51 GMT Sender: news@screamer.csee.usf.edu Reply-To: gambert@twins.csee.usf.edu (Allen Gambert) Organization: University of South Florida at Tampa Lines: 117 ________________________________________________________________ ******************* | VLSI DESIGN '92 | CALL FOR PAPERS AND PARTICIPATION ******************* THE FIFTH INTERNATIONAL CONFERENCE ON VLSI DESIGN Bangalore, India January 4-7, 1992 In Cooperation with: IEEE Computer Society Technical Committees on Design Automation and VLSI IEEE CIRCUITS AND SYSTEMS SOCIETY Sponsored by: VLSI SOCIETY OF INDIA (VSI) DEPARTMENT OF ELECTRONICS (GOVERNMENT OF INDIA) The conference is a forum for researchers and designers to present and discuss various aspects of VLSI design. The four-day program will consist of regular paper sessions, posters, tutorials, and industrial CAD exhibits. There will be opportunities for informal exchange of ideas. The proceedings will be published by the IEEE Computer Society. TOPICS OF INTEREST: CAE/CAD Systems, High Level Synthesis, Logic Synthesis, Fault Modeling, Test Generation, Design for Testability, Layout, Routing, Logic Simulation, Circuit Simulation, Timing Verification, Application Specific Devices, Microarchitecture, Regional/Global Perspectives, Economic Issues, etc. PAPERS: Six copies of previously unpublished papers should reach either program chair by June 1, 1991. A manuscript should clearly state the original contribution, significant results and applica- tions. It should not exceed ten double-spaced pages including figures and references. The authors should identify the presenting author and include the complete address, telephone and/or FAX numbers and, when possible, email address. The papers will be selected through a review process and the authors will be notified of acceptance by August 1, 1991. The camera-ready manuscripts must reach the publication chair by September 15, 1991. TUTORIALS: The symposium has run a highly successful tutorials program in the past. This year, four full-day tutorials are planned. The topics for the tutorials are open and include analog VLSI design, synthesis, formal verification, hardware description languages, distributed algorithms for VLSI CAD, CAD framework, and tools and design methodology for VLSI design in India. Proposals may be submitted to either of the tutorials chairs by June 30, 1991. A tutorial may include a software demonstration. EXHIBITS: The symposium provides a unique opportunity to CAD/CAE system vendors to display their products to the attendees. Since the available space may be limited, those interested should contact the general chair as soon as possible. AWARDS: A best paper award (Prof. A. K. Choudhury Award) of Rs.10,000 and two other honorable mention awards of Rs. 2,000 will be given. In addition a design contest is planned. Those interested in the design contest should contact the publicity chair. For any other information concerning the symposium contact publicity chairs. GENERAL CHAIRS Asoke K. Laha Lalit M. Patnaik Cadence Design Systems, Inc. Microprocessor Applications Lab Systems Division Indian Inst. of Science 2 Lowell Research Center Dr. Bangalore 560012, India Lowell, MA 01852-4995, USA +91 (812) 342451 (508) 934-0233, 441-1109 (FAX) laha@cadence.com lalit%vigyan@shakti.ernet.in ORGANIZING COMM. CHAIR G. H. Visweswara Indian Telephone Industries PROGRAM CHAIRS Yashwant K. Malaiya K.S. Raghunathan Computer Sci. Dept. Microelect. & Comp. Div. Colorado State Univ. Indian Telephone Industries Ft. Collins, CO 80523, USA Banglore 560016, India (303) 491-7031, 491-2293 (FAX) (812) 563211, 572824 (FAX) malaiya@ravi.cs.colostate.edu TUTORIALS CHAIRS Debashis Roy Chowdhury Simon Curry Gateway Design Auto. (India) Pvt Ltd Bell Northern Research SDF#A-1, NOIDA export processing zone PO Box 3511, Station C P.O. NEPZ, NOIDA 201305, U.P., India Ottawa, Ontario, Canada (05736) 62340, (05736) 62231 (FAX) (613) 763-2981, 7241 (FAX) debashis@cadence.com curry@bnr.ca PUBLICITY CHAIRS N. Ranganathan Jaswinder S. Ahuja Dept. of Comp. Sci. & Eng. Gateway Design Auto. (India) Pvt Ltd Univ. of South Florida (ENG 118) SDF#A-1, Noida Export Processing Zone Tampa. FL 33620, USA P.O. NEPZ, Noida 201305, U.P., India (813) 974-4760, 5456 (FAX) +91 (5736) 62340, 62231 (FAX) ranganat@sol.csee.usf.edu jassi@cadence.com PUBLICATIONS CHAIR Srimat T. Chakradhar NEC Research Institute 4 Independence Way Princeton, New Jersey 08540 (609) 951-2962, 2499 (FAX) chak@research.nec.com PAST CHAIRS: Vishwani D. Agrawal and A. Prabhakar -------------------------------------------------------------------------- Keywords: VLSI