Path: utzoo!utgpu!news-server.csri.toronto.edu!bonnie.concordia.ca!thunder.mcrcim.mcgill.edu!snorkelwacker.mit.edu!usc!aero-c!news From: goldstein@arecibo.aero.org (Fogbound Child) Newsgroups: comp.os.msdos.programmer Subject: Re: Protected mode/Real mode switching Message-ID: <1991Apr26.222027.3150@aero.org> Date: 26 Apr 91 22:14:49 GMT Sender: news@aero.org Organization: The Aerospace Corporation Lines: 32 -Message-Text-Follows- In article <1991Apr26.160753.4754@midway.uchicago.edu>, valley@gsbsun.uchicago.edu (Doug Dougherty) writes... >dj@ctron.com (DJ Delorie) writes about the 286 LOADALL instruction: > >>There is such an opcode, and Microsoft used it in OS/2 for 286 >>machines. From what they told me, they had a really hard time getting >>Intel to tell *them* about it. They used it primarily to set up the >>hidden portion of the segment registers in real mode to access memory >>above 1M. It is *not* available on the 386, and may not exist on new >>286 designs, or on non-Intel 286's. It's very non-portable, also. .. >uses it (LOADALL) in their systems (an operating system, no less) that that >pretty much legitimizes it. Can you imagine some clone 286 manufacturer >having to admit that their chips won't run OS/2? My new '486 motherboard has a set of options in the CMOS chipset configuration regarding exactly that. You can reconfigure the chipset to honor the LOADALL memory access if you want to run OS/2, or you can disable that feature (and gain about 1k of main memory, I think). It's hard to imagine that some undocumented feature can evolve into something so significant that chipset manufacturers are changing their PALs... >-- > > (Another fine mess brought to you by valley@gsbsun.uchicago.edu) ___Samuel___ _________I_claim_and_accept_sole_responsibility_for_the_above._SjG.____________