Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!usc!ucsd!ucbvax!ucdavis!csusac!unify!longbow!ttank!fbits!Mariusz
From: Mariusz@fbits.ttank.com (Mariusz Stanczak)
Newsgroups: comp.sys.3b1
Subject: Re: Hardware freaks Unite (on this one)
Keywords: 3B1, cache, hardware project suggestion.
Message-ID: <102@fbits.ttank.com>
Date: 24 Apr 91 07:56:31 GMT
References: <1991Mar26.023948.3966@i88.isc.com> <6386@acorn.co.uk> <326@kyzyl.mi.org>
Organization: Forth Bits
Lines: 18

In article <326@kyzyl.mi.org>, tkacik@kyzyl.mi.org (Tom Tkacik) writes:
> On the 3b1 all of the memory runs at full speed.  The 68010 does not use
> any wait states, (even for expansion memory).  A cache
> cannot speed  it up at all.  Just think of your 3b1 as already having
> 4Meg of cache.
Thinking, thinking... hmmm.  Makes sense, and if that's the case, it just
shows how little I know about the hardware... the article in Electronic
Design indeed uses a '030 @ 33MHz, though there's nothing about wait 
states (only about a "retry mode" of the '030).  Is 'wait states' all
there is about lower then possible processor performance, or at the
11MHz with 150ns memory such factors (if any) don't come into play?
(just curious).

-Mariusz
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