Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!caen!uflorida!gatech!hubcap!ddyer From: ddyer@hubcap.clemson.edu (Doug) Newsgroups: comp.sys.amiga.advocacy Subject: Re: MIPS (was Re: NeXT Press Release) Message-ID: <1991Apr28.145704.12706@hubcap.clemson.edu> Date: 28 Apr 91 14:57:04 GMT References: <1991Apr24.043828.7213@uokmax.ecn.uoknor.edu> <1991Apr24.135141.21417@convex.com> <1991Apr28.125055.13965@sugar.hackercorp.com> Distribution: comp Organization: Clemson University Lines: 55 peter@sugar.hackercorp.com (Peter da Silva) writes: >In article <1991Apr24.135141.21417@convex.com> swarren@convex.com (Steve Warren) writes: >> I saw the SPECmarks numbers. What conclusion are you drawing from them? >> It looked to me like the 68040 beat the SPARC more than the SPARC beat the >> 68040. >That's like claiming your bicycle is as good as a car because it can keep up >with an ailing VW Beetle. The SPARC is at best a mediocre RISC chip. Try >comparing it to the 88000 or the MIPS. >-- >Peter da Silva. `-_-' >. OK! Again, just for the record... (taken from comp.arch) Part of a posting by Michael Slater: -------------------------------------------------------------------- Vendor Moto Moto Intel Sun MIPS Moto IBM Intel Achitecture 68040 68040 486 SPARC R3000 88000 RS/6000 i860 Cache none 128K 128K 128K 128K 128K 64K/8K none Clock (MHz) 25 25 25 25 25 25 25 33 -------------------------------------------------------------------- Integer gcc 12.4 13.8 13.8 13.8 15.5 17.5 17.8 11.5 espresso 12.8 13.4 12.2 11.6 17.7 19.4 20.7 20.0 li 14.9 15.5 16.8 11.2 20.4 20.7 19.8 17.7 ------------------------------------------------------------------- FP spice2g6 11.8 13.1 8.8 11.4 12.1 12.5 27.6 14.8 doduc 7.7 8.1 5.8 9.5 15.9 10.1 27.7 15.6 nasa7 11.5 12.1 5.8 14.0 18.1 15.2 35.5 45.0 matrix300 10.8 11.5 9.5 14.7 13.8 18.4 21.8 21.5 fpppp 12.1 13.4 7.0 13.1 17.8 14.7 54.7 21.8 tomcatv 8.4 9.1 4.3 8.2 13.9 11.6 75.7 34.0 -------------------------------------------------------------------- Means SPECmark 11.0 11.8 8.8 11.8 16.1 15.2 28.9 20.3 Integer 12.3 12.9 13.3 12.3 17.6 18.3 20.2 16.4 FP 10.2 11.0 6.6 11.6 15.1 13.5 36.7 23.4 ------------------------------------------------------------------ SPEC benchmark results for CISC and RISC systems at 25 MHz (except i860 at 33 MHz). All results as published by SPEC, except for 486 and 860 results published by Intel and 68040 results provided by HP. The systems are the HP 425t, HP 425s, an unspecified 486 system, Sun SPARCstation 330, MIPS RC3240, Motorola 8864SP, IBM RS/6000 Model 530, and an 860 PC add-in board with static column DRAM. Cache sizes shown are external (second-level) caches only, except for RS/6000. MIPS and 88K caches are 64K instruction and 64K data. ------------------------------------------------------------------- Michael Slater, Editor and Publisher, Microprocessor Report mslater@cup.portal.com 707/823-4004 fax: 707/823-0504 874 Gravenstein Hwy. So., Suite 14, Sebastopol 95472 -- Doug Dyer ddyer@hubcap.clemson.edu