Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!sdd.hp.com!hplabs!hpcc05!hpcuhb!hpihoah!mj
From: mj@hpihoah.cup.hp.com (Marlin Jones)
Newsgroups: comp.sys.ibm.pc.hardware
Subject: Re: Are there DIFFERENT 100ns DRAM chips?
Message-ID: <25880003@hpihoah.cup.hp.com>
Date: 25 Apr 91 16:48:57 GMT
References: <wp.672074748@iddth2>
Organization: Hewlett Packard, Cupertino
Lines: 40

> From wp@iddth.id.dk Fri Apr 19 08:25:48 1991
> "100ns fast page mode DRAMs with the following critical DRAM specifications:
> tCAS<=35ns, tCAC<=35ns, tCP<=20ns".
> and then it "explains" the terminology:
> tCAS - CAS pulse width
> tCAC - CAS access time
> tCP  - CAS prechage time
> What are these parameters? What do they mean? Does it mean that there are

These are timing parameters on the waveforms that are supplied to each DRAM.
It would be pretty hard to explain these without a timing diagram - what
you need is to look at a DRAM vendor's data book.  Some databooks that come
to mind:

Texas Instruments,  "MOS Memory Data Book"
Mitsubishi,  "Semiconductor Memories Data Book"
Toshiba,  "MOS Memory Data Book"

> different 100ns DRAM chips? Are they marked with these additional parameters?

No.   Each vendor has slightly different specifications for each "100 ns"
DRAM.   You need to look at each vendor's data book and find out what values
they have for these parameters.   *OR*, you could have your friend call the
folks that sold him the system and ask for the specific DRAM vendor's that
meet the specs.

> I mean - is it written on the chip that it has tCAS<=35ns for example?

Nope.

> Totally confused,
> Wiesiek.

Hope this helps.

mj

Marlin Jones       hplabs!hpda!mj    mj@hpda.hp.com

"I practice safe motorcycling - I keep the rubber on the road."