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From: fsset@bach.lerc.nasa.gov (Scott E. Townsend)
Newsgroups: comp.sys.m88k
Subject: Is the FPSR interlocked with the FPU pipe?
Message-ID: <1991Apr24.200412.7483@eagle.lerc.nasa.gov>
Date: 24 Apr 91 20:04:12 GMT
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Organization: Nasa Lewis Research Center ( Cleveland )
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Originator: root@bach.lerc.nasa.gov

This sounds too strange to be true, but is it possible for the FPSR to
return 'too fresh' data?  Or put another way, why should the following two
code fragments behave differently?

#1
	fdiv.ddd r8,r2,r4
	fldcr	 r12,fcr62	; fcr62 == FPSR
	bb1	 0,r12,@L21	; AFINX bit

#2
        fdiv.ddd r8,r2,r4
	tb1	 0,r0,0		; trap not taken, but system 'synced'
        fldcr    r12,fcr62
        bb1      0,r12,@L21

This code is buried a bit, so I don't have the exact different results,
but the behaviour _is_ different.  Is it possible the fldcr gets whatever
is 'current' rather than the result of the fdiv? (which will take a while)

Please show me I'm sniffing glue!