Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!swrinde!cs.utexas.edu!uunet!munnari.oz.au!bruce!trlluna!rhea!aduncan From: aduncan@rhea.trl.oz (Allan Duncan) Newsgroups: comp.lang.c Subject: Re: Found a TC 2.0 bug... ? Message-ID: <3445@trlluna.trl.oz> Date: 29 Apr 91 22:06:03 GMT References: <32383@usc> Sender: news@trlluna.trl.oz Lines: 19 From article <32383@usc>, by ajayshah@alhena.usc.edu (Ajay Shah): > I think I have identified a bug in TC 2.0. [sample program and output deleted] > Question: why does he have problems allocating > 64k??? Is the > culprit Intel or Borland? Just Intel and the program - because of Intel's abysmal addressing scheme with its unconnected segment and paragraph registers (I think that's the terminology) it is difficult to handle addressing in lumps bigger than 64K. Borland has chosen to go for speed and compactness by limiting you to a 16 bit int (+/-32K, or 64K unsigned), probably in part because of this. On the 68000 CPU there are compilers that will do either 16 or 32 bit ints at the flick of a compiler switch. Allan Duncan ACSnet a.duncan@trl.oz (+613) 541 6708 Internet a.duncan@trl.oz.au UUCP {uunet,hplabs,ukc}!munnari!trl.oz.au!a.duncan Telecom Research Labs, PO Box 249, Clayton, Victoria, 3168, Australia.