Xref: utzoo comp.lsi.cad:939 comp.lsi:1465 Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!uakari.primate.wisc.edu!ra!Ra.msstate.edu!boes From: boes@ITD.MsState.Edu (Barry Boes) Newsgroups: comp.lsi.cad,comp.lsi Subject: Re: Want cell level (not flattened) extraction tool for MAGIC Message-ID: Date: 29 Apr 91 17:50:56 GMT References: <1991Apr20.195712.19331@loop.uucp> Sender: usenet@ra.MsState.Edu Followup-To: comp.lsi.cad Organization: /home2/boes/.organization Lines: 29 Nntp-Posting-Host: zeus.erc.msstate.edu In-reply-to: keithl@loop.uucp's message of 20 Apr 91 19:57:12 GMT >From: keithl@loop.uucp (Keith Lofstrom;;;628-3645) > >The various "ext2foo" magic extraction tools I have translate a ".ext" file >into a completely flattened transistor level file. Useful, but... > .I need a program that will read .ext format and turn out semi-readable >cell calls and capacitance (resistance optional) without flattening. >I will be using the results and hand editing to feed SILOS and other tools. >Have you got something that will do this? > >Thanks, >Keith We here at the Institute for Technology Development have developed a hierarchical Spice extractor (IIg6 or hspice format) for magic version 4.xx. This extractor was developed under a DARPA contract and is free to US organizations. Perhaps the spice format generated would suit your needs for a readable hierarchical netlist. Barry Boes Computer Engineer Phone : 601-325-2240 Institute for Technology Development Fax : 601-325-8144 Advanced Microelectronics Division e-mail : boes@ITD.MsState.edu 1 Research Boulevard, Suite 205 Starkville, MS 39759