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From: steveh@tasman.cc.utas.edu.au (Steven Howell)
Newsgroups: comp.sys.m68k
Subject: Zilogs Z8530 SCC - Help Required
Message-ID: <steveh.673004922@tasman>
Date: 30 Apr 91 09:48:42 GMT
Sender: news@diemen.utas.edu.au
Distribution: comp
Lines: 46



	Evening folks.

I have a small, well large actually, problem that needs some attention.

I was curious if some of you programming pro's could help me out on this
one.
We have just overhauled a system design and updated it. However a few
elements had to be axed due to their speed/age etc. One of those replaced
was 4 SY6551 Serial controller chips.  Me, (Steveh), being the hardware man
, i decided to replace these controllers with two Z8530 serial SCC chips.
The same as those used in Macs and Suns.

However, the programmer has doubted the chip, since there are too many register 
to keep track of via firmware, but I still want this chip employed.

Could someone PLEASE give me an example of how the registers would be set up
for a simple comms example.  Eg. say i wanted to;
Txd 9600
data bits 8
stop bits 1
 
parity none
dtr  enabled
xon/xoff enabled
transmit  Unlimited


at these settings, just to get the thing up and going. 

What would the 14 write registers and 7 read register look like. How would they be programmed for just that task, and too ignore all this sldc and other
extra functions.

Thanks in advance



steve h