Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!swrinde!ucsd!ucrmath!rhyde
From: rhyde@ucrmath.ucr.edu (randy hyde)
Newsgroups: comp.sys.nsc.32k
Subject: SCSI Woes, revisited
Message-ID: <14108@ucrmath.ucr.edu>
Date: 1 May 91 23:03:33 GMT
Organization: University of California, Riverside
Lines: 30

I found a problem with my SCSI driver.  It seems the assembler I'm
using (Solutionware's NSX16 cross software package for CP/M [running
on a Z-80 card on my PC]) generates bad code.

I hand compiled Bruce's C code and managed to get it to work.  As I
massaged it towards my code ("keep it working")  I discovered that I
could break the code by inserting NOPs in at certain points of the code
investigation showed the assembler producing bad offsets under certain
circumstances.  Sigh.  Minix is on it's way.  Guess I'll have to wait
for Bruce's assembler before I continue with my explorations.

I have a couple of quick questions on the subject.

The manual states that you shouldn't use interruptable instructions for
pseudo-DMA (I assume this means MOVSi).  What about MOVMD?  Is this
instruction kosher?  What is the problem with an interruptable instr.
like MOVS?

Also, since the cache is write-though, I assume that I do not need to
increment the destination pointer when writing to the pseudo-DMA area
(except one bump at the end of the operation to prevent a read from
that same location later on causing a problem).  Is this correct?

While on the subject, what's wrong with simply disabling the data cache
while accessing the pseudo-DMA area?  Can't you disable the data cache and
leave the instr cache going?  This would seem to produce the best performance
anyway since constantly reading from (or writing to) the pseudo-DMA area would 
tend to invalidate a lot of the cache.  Is this a correct assumption?

*** Randy Hyde