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From: hrubin@pop.stat.purdue.edu (Herman Rubin)
Newsgroups: comp.arch
Subject: Re: skip instructions
Message-ID: <11874@mentor.cc.purdue.edu>
Date: 4 May 91 12:31:38 GMT
References: <1182@opus.NMSU.Edu> <3027@spim.mips.COM>
Sender: news@mentor.cc.purdue.edu
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In article <3027@spim.mips.COM>, dd@mips.com ("BOB requires a human host!  He feeds on fear... and the pleasures.") writes:
> In article <1182@opus.NMSU.Edu> jthomas@nmsu.edu (James Thomas) writes:
> >Is there a reference (or more) describing why SKIP instructions have mostly
> >disappeared from instruction sets?  The 704x and 709x had them, so the
> >PDP-6 had them (and maybe therefore the PDP-8 inherited them).  Now the
> >HP-PA has them hiding in the guise of the nullify bit.  Are conditional
> >branches generically more useful?
> 
> SPARC also has them, in the guise of annulled branches.  In current
> implementations they're no faster than any other branch, and I don't think
> the Sun compilers make an effort to use them.

I am somewhat surprised that they are not more common on RISCs.  An advantage
of a skip instruction over a branch is that the skip does not need an address,
and so more versatility is available with the same hardware.  Probably even
better would be an instruction which has a conditional forward branch to a
nearby instruction, quite possibly even in the current stack.  I suggest that
it might be possible for some of this to be due with consideration of doing
both simultaneously, and avoiding much branch cost.
-- 
Herman Rubin, Dept. of Statistics, Purdue Univ., West Lafayette IN47907-1399
Phone: (317)494-6054
hrubin@l.cc.purdue.edu (Internet, bitnet)   {purdue,pur-ee}!l.cc!hrubin(UUCP)