Path: utzoo!utgpu!cunews!cognos!geovision!gd
From: gd@geovision.gvc.com (Gord Deinstadt)
Newsgroups: comp.arch
Subject: Re: skip instructions
Message-ID: <1545@geovision.gvc.com>
Date: 4 May 91 20:50:14 GMT
References: <1182@opus.NMSU.Edu> <3027@spim.mips.COM> <11874@mentor.cc.purdue.edu>
Organization: GeoVision Corp., Ottawa, Ontario
Lines: 20

James Thomas writes:
>Is there a reference (or more) describing why SKIP instructions have mostly
>disappeared from instruction sets?
Conditional branch instructions were a big step forward in CISC days;
they accomplished in one instruction what had previously taken two.
The original reason for skips was, I think, that instructions were much
shorter in those days - there wasn't room for a branch address and a
condition field in the same instruction.  The PDP-11 had conditional branches
but only 8 bits for the offset, in a 16-bit word.  The PDP-8 used skips
and had a 12-bit word.  I don't know about mainframes.

Herman Rubin writes:
>I am somewhat surprised that they are not more common on RISCs.
In a pipelined machine, would it not be more efficient to just deactivate
a couple of instructions rather than go through the pain of a forward
branch?  In other words just keep grinding forward, but inhibiting
execution for a specified number of cycles, rather than trying to
change course.  There would be no branch delay slot.
--
Gord Deinstadt  gdeinstadt@geovision