Newsgroups: comp.arch
Path: utzoo!utgpu!watserv1!watdragon!rose.waterloo.edu!ccplumb
From: ccplumb@rose.waterloo.edu (Colin Plumb)
Subject: Re: H1 details?
Message-ID: <1991May6.031949.26282@watdragon.waterloo.edu>
Sender: news@watdragon.waterloo.edu (News Owner)
Organization: University of Waterloo
References: <1991Apr25.185728.1306@britesun.radig.de> <1991Apr26.053510.19231@watdragon.waterloo.edu> <15856@ganymede.inmos.co.uk>
Date: Mon, 6 May 1991 03:19:49 GMT
Lines: 8

I'd like to apologise for denying the achievements of the H1 (T9000)
transputer development team.  The transputer's 0 and 1-operand instructions
and prefix instructions produce a native MIPS figure almost an order
of magnitude larger than other processors, and this figure has been
trumpeted in the past.  If they can execute 8 "real" instructions
in a cycle (peak), they've done something significant and praiseworthy.
-- 
	-Colin