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From: dik@cwi.nl (Dik T. Winter)
Newsgroups: comp.arch
Subject: Re: skip instructions
Keywords: VLSI, ARCON, RISC, intsructions, SKIP, pipeline
Message-ID: <3449@charon.cwi.nl>
Date: 5 May 91 23:59:37 GMT
References: <3446@charon.cwi.nl> <1991May5.162722.29507@berlioz.nsc.com> <1991May05.180933.23091@kithrup.COM>
Sender: news@cwi.nl
Organization: CWI, Amsterdam
Lines: 36

In article <1991May05.180933.23091@kithrup.COM> sef@kithrup.COM (Sean Eric Fagan) writes:
 > In article <1991May5.162722.29507@berlioz.nsc.com> my@berlioz.nsc.com (Michael Yip) writes:
 > >The Arcon RISC chip has one (or two??) conditional execution bit in each
-->     Acorn
 > >instruction and depends on the condition set by previous instructions
 > 
 > There are four bits in every instruction (the first four, in fact).  If I
 > could find my ARM manual, I could even tell you what they were 8-(.
Just the standard set (carry, equal, greater, high, etc.).  Also there is a bit
that tells whether the conditions should be set or not.
 > 
 > I figured out a way, once, to make gcc use them (peepholing, of course).
 > From the manual, I think I decided that it was really only worthwhile if the
 > branch would skip over four or fewer instructions.
True enough.  But that is really a function of the depth of the pipeline, and
the delay incurred using branches.  Also I do think that plain peepholing is
not enough to really make good use of the feature.  When used well you can
get very compact codes for a number of common cases (see the abs and max
example I gave in another post for another machine with this feature).

I believe that conditional execution is a more useful feature than skips.
Skips allow only the single next instruction to be skipped, and in most
cases I have seen that was a branch.  Of course conditional skips make
conditional branches unneeded.

I have seen mentioned that SPARC and HPPA had skip's.  For the SPARC that is
of course not true.  A skip implies that the result of the current operation
tells whether the next instruction has to be executed or not.  This is not
true on the SPARC.  Also the HP-PA annul bit does not count as a skip in
this sense.  The only HP-PA instructions that could be interpreted as skips
are the 'ADD AND BRANCH' instructions.  But in general the branching
instructions are just that: conditional branches.  The only machine I know
(this is a disclaimer) with true skips is the NOVA.
--
dik t. winter, cwi, amsterdam, nederland
dik@cwi.nl