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From: kdarling@hobbes.catt.ncsu.edu (Kevin Darling)
Newsgroups: comp.arch
Subject: Re: New Moto chips
Message-ID: <1991May6.143700.22414@ncsu.edu>
Date: 6 May 91 14:37:00 GMT
References: <11399@uwm.edu> <JH_ABJF@xds13.ferranti.com> <1991Apr29.144421.19819@oakhill.sps.mot.com> <+=+A+N6@xds13.ferranti.com> <3397@crdos1.crd.ge.COM> <14720@encore.Encore.COM> <3403@crdos1.crd.ge.COM>
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davidsen@crdos1.crd.ge.COM (Wm E Davidsen Jr) writes:
>In article <14720@encore.Encore.COM> jcallen@encore.Com (Jerry Callen) writes:
>|
>| - a 68040 with the MMU and FPU disabled
>| - a 68030 with the MMU disabled
>
>  Following in Intel's footsteps, taking something functional and
>reducing functionality to boost the profit margin and hurt competition.

I was under the impression that these were simply chips which didn't pass
all the MMU/FPU tests.  Maybe not.  But if they're willing to sell me
them at a lower price for controller apps, I have no objection at all :-).
  cheers - kevin <kdarling@catt.ncsu.edu>