Newsgroups: comp.arch Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!magnus.acs.ohio-state.edu!csn!arrayb!wicklund From: wicklund@intellistor.com (Tom Wicklund) Subject: Re: New Moto chips (was Will NeXT survive?) Message-ID: <1991May6.213104.22868@intellistor.com> Organization: Intellistor References: <3397@crdos1.crd.ge.COM> <14720@encore.Encore.COM> <7627@auspex.auspex.com> Date: Mon, 6 May 91 21:31:04 GMT In <7627@auspex.auspex.com> guy@auspex.auspex.com (Guy Harris) writes: >Those chips sound like the 68EC040, 68EC030, 68EC020, and 68EC000, >respectively; "EC" stands, presumably, for "Embedded Controller", that >being what the chips are intended to serve as CPUs for. I don't think >Motorola had UNIX-box vendors like NeXT in mind; they may or may not >have had Apple in mind, but I wouldn't be the least surprised to find >they didn't have Apple in mind either. They are the 68ECxxx series. They are intended for embedded applications, meaning they have the MMU/FPU removed, fewer address lines (24 instead of 32 in 68EC020 and (I think) 68EC030. The advantages of these chips are lower cost and standardized tools. Using a 68ECxxx (or 80x86) for embedded applications one can choose from a large number of tools designed for the procesor. Speed and compiler quality are much better than microcontrollers (the 6811/8051/8096 etc families are SLOW and compilers are relatively hard to optimize). The market Motorola is going after is for high performance embedded systems such as disk controllers (and drives), communication controllers (e.g. 16 serial ports, Ethernet, FDDI), and automobiles (the 68332 was designed for one of the auto makers). The choices for high performance are processors like these or signal processors (DSPs). DSPs are best for applications requiring multiple / accumulate operations (they range up to multi-megaflop performance), however there are many embedded applications that just need a fast processor. For instance, I've worked for many years with disk controllers. Not counting initialization or error recovery (where performance isn't a real issue) the code had 2 divide and 2 multiply operations. So math performance isn't critical -- primarily high instruction execution rates. Some of the RISC makers are also starting to address the embedded systems market with RISC processors which don't need as many support chips or work with slower (cheaper) memory.