Newsgroups: comp.arch
Path: utzoo!utgpu!cunews!hobbit.gandalf.ca!dcarr
From: dcarr@hobbit.gandalf.ca (Dave Carr)
Subject: Re: New Moto chips (was Will NeXT survive?)
Message-ID: <1991May7.124504.10758@hobbit.gandalf.ca>
Organization: Gandalf Data Ltd.
References: <11399@uwm.edu> <JH_ABJF@xds13.ferranti.com> <1991Apr29.144421.19819@oakhill.sps.mot.com> <+=+A+N6@xds13.ferranti.com> <3397@crdos1.crd.ge.COM> <14720@encore.Encore.COM> <3403@crdos1.crd.ge.COM>
Distribution: na
Date: Tue, 7 May 1991 12:45:04 GMT
Lines: 17

In <3403@crdos1.crd.ge.COM> davidsen@crdos1.crd.ge.COM (Wm E Davidsen Jr) writes:

>In article <14720@encore.Encore.COM> jcallen@encore.Com (Jerry Callen) writes:

>| - a 68040 with the MMU and FPU disabled
>| - a 68030 with the MMU disabled

>  Following in Intel's footsteps, taking something functional and
>reducing functionality to boost the profit margin and hurt competition.
>There's a nice technical term for chips with functions disabled by bean
>counters: capon. 

I don't know about Intels crippled chips, but the Moto EC series are different
dies than their more capable forerunners.  According to our Moto rep, this was
done to get more dies/wafer, and higher yields which is reflected in the price
of the chips.