Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!wuarchive!uunet!mcsun!hp4nl!charon!dik
From: dik@cwi.nl (Dik T. Winter)
Newsgroups: comp.arch
Subject: Re: skip instructions
Keywords: VLSI, ARCON, RISC, intsructions, SKIP, pipeline
Message-ID: <3456@charon.cwi.nl>
Date: 6 May 91 23:39:39 GMT
References: <1991May5.162722.29507@berlioz.nsc.com> <1991May05.180933.23091@kithrup.COM> <3449@charon.cwi.nl>
Sender: news@cwi.nl
Organization: CWI, Amsterdam
Lines: 11

In article <3449@charon.cwi.nl> I write:
 >                     Also the HP-PA annul bit does not count as a skip in
 > this sense.  The only HP-PA instructions that could be interpreted as skips
 > are the 'ADD AND BRANCH' instructions.
This is of course not true.  There are many more instruction with conditional
nullification.  So they really count as skip's.

Red face etc.
--
dik t. winter, cwi, amsterdam, nederland
dik@cwi.nl