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From: dbh@doc.ic.ac.uk (Denis Howe)
Newsgroups: comp.sys.acorn
Subject: ROM speed [was: various MEMCs]
Message-ID: <DBH.91May6201750@asun4.doc.ic.ac.uk>
Date: 6 May 91 19:17:50 GMT
References: <1991May6.015432.5020@alzabo.ocunix.on.ca>
Organization: Dept. of Computing, Imperial College, London, UK
Lines: 12
In-Reply-To: andras@alzabo.ocunix.on.ca's message of 6 May 91 01:54:32 GMT

And while we're on the subject of MEMC, can anyone say exactly what
the effect of the memc_roms program on the Newcastle server is?  It
sets the MEMC speed (cycle time) for the ROMs to, what my VLSI data
book says is "Not Meaningful" but which extrapolation from the other
possibilities (450, 325, 200ns) would suggest is actually 75ns.  It
does produce a speed-up (~25% for
	FOR I%=0 TO 10000:NEXT
) and doesn't seem to crash my A410.  Am I just lucky?
--
Denis Howe <dbh@doc.ic.ac.uk>      C-C
H558A Imperial College London     C-C-C
   +44 (71) 589 5111 x5064         N=N