Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!rphroy!caen!uwm.edu!bionet!agate!sunspot.berkeley.edu!johnf From: johnf@ssl.berkeley.edu (John Flanagan) Newsgroups: comp.sys.amiga.hardware Subject: How does an expansion board control DTACK*? Message-ID: Date: 4 May 91 11:32:39 GMT Sender: root@agate.berkeley.edu (Charlie Root) Organization: CEA @ UC Berkeley, Berkeley, CA, USA. Lines: 41 Hi, I am trying to come up with a fix to get my Products ByNery shareware XT HD interface to work with my A500/LUCAS/FRANCES at a clock speed above 12 MHz. I think I know how to solve this problem if I can get some pointers on how expansion devices are supposed to behave. The basic problem is that I need to be able to control (delay) DTACK* when the interface card gets a R/W request. At least, this is what I can glean from the 68000 handbook. The problem is that GARY seems to be in control of DTACK*. I've pored over the A500 schematics and the 1.3 Hardware Reference Manual, and have come to the conclusion that I need to have my board let GARY know that it is not yet ready for DTACK* to go out, and that this is probably accomplished through the use of XRDY and/or OVR*, which are available from the expansion interface. Unfortunately, the Hardware Reference Manual provides absolutely no information on the use of the expansion bus signals, and the A500 manual only provides a rough block description of GARY, so I've tried to guess at how the signals are used. My first guess was to lower XRDY until I'm ready for DTACK*, and hope that GARY will generate DTACK when I let up on XRDY. No luck. Now I'm thinking that maybe I should pull OVR* (override) down, and generate DTACK* myself. But before I get into pulling random bus signals down in the hopes of hitting the right combination, I thought I'd tap into the knowledge pool of the net hardware hackers and any passing Commodore employees to ask how this is supposed to be done. I think this is a fairly simple problem, and I hope I have provided enough information, but I can provide more details on what exactly I am trying to do, if needed. Thanks in advance for any help, John -- John Flanagan Center for EUV Astrophysics johnf@ssl.berkeley.edu University of California (...!ucbvax!soc1.ssl!johnf) Berkeley, CA 94720