Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!usc!ucselx!crash!pnet01!uzun From: uzun@pnet01.cts.com (Roger Uzun) Newsgroups: comp.sys.amiga.programmer Subject: Macro-68 Questions Message-ID: <9037@crash.cts.com> Date: 4 May 91 18:36:01 GMT Sender: root@crash.cts.com Organization: People-Net [pnet01], El Cajon CA Lines: 21 [] I am trying to assemble the compress.asm listing that was posted here, it was for Macro 68 originally. 2 questions : 1) In the code it has a line saying : IFGT EntryBitsPerHash, some sort of psuedo-op. What does it mean? Is it conditional assembly? it also has an ELSE and ENDIF for the IFGT. How do I translate this section for the Lattice Assembler? 2) Is bhs.s the same as bhi.s followed by beq.s? That is what I assumed, bhs is not a true 68000 opcode in any case. That is about it, I am trying to get it working from C, using lattice C 5.10a If anyone knows about macro 68, and the above anomalies, please let me know. -Roger UUCP: {hplabs!hp-sdd ucsd nosc}!crash!pnet01!uzun ARPA: crash!pnet01!uzun@nosc.mil INET: uzun@pnet01.cts.com