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From: lindsay@gandalf.cs.cmu.edu (Donald Lindsay)
Newsgroups: comp.arch
Subject: Re: New Moto chips
Message-ID: <13009@pt.cs.cmu.edu>
Date: 12 May 91 04:48:09 GMT
References: <3403@crdos1.crd.ge.COM>
Organization: Carnegie Mellon
Lines: 19

In article <3403@crdos1.crd.ge.COM> davidsen@crdos1.crd.ge.com 
	(bill davidsen) writes:
>| - a 68040 with the MMU and FPU disabled
>| - a 68030 with the MMU disabled
>  Following in Intel's footsteps, taking something functional and
>reducing functionality to boost the profit margin and hurt competition.

Actually, Motorola's strategy is quite different from Intel's.  These
chips (the EC series) should be seen as compatible upgrades to the
low-end 68Ks, not downgrades of the high-end. They've made changes
(such as pinout) which are aimed at pleasing the current customers of
the older low-end chips.

I heard yesterday about a board which used to contain a SPARC. The
new, ten-times-faster version of the board is going to contain a 68K
instead, because the heavy work obviously had to be migrated to
hardware, and a 68K is now cheap.
-- 
Don		D.C.Lindsay 	Carnegie Mellon Robotics Institute