Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!swrinde!elroy.jpl.nasa.gov!ncar!gatech!hubcap!ncrcae!sst!hutton From: hutton@sst.Columbia.NCR.COM (Ed Hutton) Newsgroups: comp.lang.vhdl Subject: BIST Keywords: BIST tools insertion Message-ID: <343@sst.Columbia.NCR.COM> Date: 10 May 91 14:39:32 GMT Organization: NCR Corp., Engineering & Manufacturing - Columbia, SC Lines: 12 Could someone direct me to a source of information on the insertion of BIST (Built In Self Test) in a VHDL based design environment? I am primarily interested in pseudo-random BIST techniques useful for in-circuit test. I am interested in any on going research and/or commercial test insertion tools. Thanks, Ed Hutton -- ed.hutton@ncrcae.Columbia.NCR.COM (Ed Hutton) ...!uunet!ncrlnk!ncrcae!hutton ...!gatech!hubcap!ncrcae!hutton