Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!cis.ohio-state.edu!tut.cis.ohio-state.edu!ucbvax!bloom-beacon!eru!hagbard!sunic!lth.se!newsuser From: d87mt@efd.lth.se (Magnus Thelander) Newsgroups: comp.sys.amiga.hardware Subject: Re: GVP series II controller non-DMA? Message-ID: <1991May13.103247.29993@lth.se> Date: 13 May 91 10:32:47 GMT References: <11189@hub.ucsb.edu> Sender: newsuser@lth.se (LTH network news server) Reply-To: d87mt@efd.lth.se (Magnus Thelander) Followup-To: comp.sys.amiga.hardware Organization: Lund Institute of Technology, Sweden Lines: 21 >Does this mean that this board can not DMA to chip or 0xC00000 fast ram? >Or have they done something clever? > >If this board can't DMA to some part of memory, they will either have >a mask entry or hide it by handleing it in the harddrive.device. I was the one who asked the initial question about GVP II not being DMA, and the answers I got, said that DMA is only used to move the data to a buffer on the controller. From there the processor has to fetch it, which makes it a processor-controlled controller. ------------------------------------------------------------------------------- | Magnus Thelander | "No the polarbears don't walk Student at Lund institute of technology | around in the streets of Sweden | Stockholm." | Internet: d87mt@efd.lth.se | FIDO-net: 2:200/123.3 | | -------------------------------------------------------------------------------